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Ferry Toth authored
tx buffer is circular, so when a message sent is placed near the end of the buffer, transmit happens as 2 dma transactions. The 2nd is started on interrupt and latency can cause a interchar gap. This copies the buffer to a lineair buffer so each message is always sent in a single transaction. This only works for message less than a page size. while we're at it, hsu and hsu dma interrupts are handled by the hsu handler. However, hsu dma also generates it own interrupts. The hsu dma handler does not handle these, but since they are level triggered, they reoccur and an interrupts storm happens. On edison the hsu dma interrupt line is not shared with other devices, so we can just disable the interrupt Signed-off-by:
Ferry Toth <ftoth@exalondelft.nl>
Ferry Toth authoredtx buffer is circular, so when a message sent is placed near the end of the buffer, transmit happens as 2 dma transactions. The 2nd is started on interrupt and latency can cause a interchar gap. This copies the buffer to a lineair buffer so each message is always sent in a single transaction. This only works for message less than a page size. while we're at it, hsu and hsu dma interrupts are handled by the hsu handler. However, hsu dma also generates it own interrupts. The hsu dma handler does not handle these, but since they are level triggered, they reoccur and an interrupts storm happens. On edison the hsu dma interrupt line is not shared with other devices, so we can just disable the interrupt Signed-off-by:
Ferry Toth <ftoth@exalondelft.nl>
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