drivers/phy/qualcomm/phy-qcom-qmp.h · e73f0f0ee7541171d89f2e2491130c7771ba58d3 · Dennis Giaya / linux · GitLab

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Apr 27, 2021

phy: qcom-qmp: Add support for SDX55 QMP PCIe PHY · be0ddb5d

Manivannan Sadhasivam authored Apr 27, 2021

The PCIe PHY version used in SDX55 is v4.20 which has different register
offsets compared to the v4.0x PHYs. So separate register defines are
used for init sequence and PHY status.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210427065400.18958-4-manivannan.sadhasivam@linaro.org

Signed-off-by: Vinod Koul <vkoul@kernel.org>

be0ddb5d

phy: qcom-qmp: Add support for SDX55 QMP PCIe PHY

Manivannan Sadhasivam authored Apr 27, 2021

The PCIe PHY version used in SDX55 is v4.20 which has different register
offsets compared to the v4.0x PHYs. So separate register defines are
used for init sequence and PHY status.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210427065400.18958-4-manivannan.sadhasivam@linaro.org

Signed-off-by: Vinod Koul <vkoul@kernel.org>