drivers/clk/at91/sama5d2.c · da0c9ea146cbe92b832f1b0f694840ea8eb33cce · Dennis Giaya / linux · GitLab

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Sep 11, 2019

clk: at91: allow 24 Mhz clock as input for PLL · 81a6b601

Eugen Hristev authored Sep 11, 2019

The PLL input range needs to be able to allow 24 Mhz crystal as input
Update the range accordingly in plla characteristics struct

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lkml.kernel.org/r/1568183622-7858-1-git-send-email-eugen.hristev@microchip.com

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Fixes: c561e41ce4d2 ("clk: at91: add sama5d2 PMC driver")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

81a6b601

clk: at91: allow 24 Mhz clock as input for PLL

Eugen Hristev authored Sep 11, 2019

The PLL input range needs to be able to allow 24 Mhz crystal as input
Update the range accordingly in plla characteristics struct

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lkml.kernel.org/r/1568183622-7858-1-git-send-email-eugen.hristev@microchip.com

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Fixes: c561e41ce4d2 ("clk: at91: add sama5d2 PMC driver")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>