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    40272035
    powerpc/bpf: Reallocate BPF registers to volatile registers when possible on PPC32 · 40272035
    Christophe Leroy authored
    
    
    When the BPF routine doesn't call any function, the non volatile
    registers can be reallocated to volatile registers in order to
    avoid having to save them/restore on the stack.
    
    Before this patch, the test #359 ADD default X is:
    
       0:	7c 64 1b 78 	mr      r4,r3
       4:	38 60 00 00 	li      r3,0
       8:	94 21 ff b0 	stwu    r1,-80(r1)
       c:	60 00 00 00 	nop
      10:	92 e1 00 2c 	stw     r23,44(r1)
      14:	93 01 00 30 	stw     r24,48(r1)
      18:	93 21 00 34 	stw     r25,52(r1)
      1c:	93 41 00 38 	stw     r26,56(r1)
      20:	39 80 00 00 	li      r12,0
      24:	39 60 00 00 	li      r11,0
      28:	3b 40 00 00 	li      r26,0
      2c:	3b 20 00 00 	li      r25,0
      30:	7c 98 23 78 	mr      r24,r4
      34:	7c 77 1b 78 	mr      r23,r3
      38:	39 80 00 42 	li      r12,66
      3c:	39 60 00 00 	li      r11,0
      40:	7d 8c d2 14 	add     r12,r12,r26
      44:	39 60 00 00 	li      r11,0
      48:	7d 83 63 78 	mr      r3,r12
      4c:	82 e1 00 2c 	lwz     r23,44(r1)
      50:	83 01 00 30 	lwz     r24,48(r1)
      54:	83 21 00 34 	lwz     r25,52(r1)
      58:	83 41 00 38 	lwz     r26,56(r1)
      5c:	38 21 00 50 	addi    r1,r1,80
      60:	4e 80 00 20 	blr
    
    After this patch, the same test has become:
    
       0:	7c 64 1b 78 	mr      r4,r3
       4:	38 60 00 00 	li      r3,0
       8:	94 21 ff b0 	stwu    r1,-80(r1)
       c:	60 00 00 00 	nop
      10:	39 80 00 00 	li      r12,0
      14:	39 60 00 00 	li      r11,0
      18:	39 00 00 00 	li      r8,0
      1c:	38 e0 00 00 	li      r7,0
      20:	7c 86 23 78 	mr      r6,r4
      24:	7c 65 1b 78 	mr      r5,r3
      28:	39 80 00 42 	li      r12,66
      2c:	39 60 00 00 	li      r11,0
      30:	7d 8c 42 14 	add     r12,r12,r8
      34:	39 60 00 00 	li      r11,0
      38:	7d 83 63 78 	mr      r3,r12
      3c:	38 21 00 50 	addi    r1,r1,80
      40:	4e 80 00 20 	blr
    
    Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
    Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    Link: https://lore.kernel.org/r/b94562d7d2bb21aec89de0c40bb3cd91054b65a2.1616430991.git.christophe.leroy@csgroup.eu
    40272035
    powerpc/bpf: Reallocate BPF registers to volatile registers when possible on PPC32
    Christophe Leroy authored
    
    
    When the BPF routine doesn't call any function, the non volatile
    registers can be reallocated to volatile registers in order to
    avoid having to save them/restore on the stack.
    
    Before this patch, the test #359 ADD default X is:
    
       0:	7c 64 1b 78 	mr      r4,r3
       4:	38 60 00 00 	li      r3,0
       8:	94 21 ff b0 	stwu    r1,-80(r1)
       c:	60 00 00 00 	nop
      10:	92 e1 00 2c 	stw     r23,44(r1)
      14:	93 01 00 30 	stw     r24,48(r1)
      18:	93 21 00 34 	stw     r25,52(r1)
      1c:	93 41 00 38 	stw     r26,56(r1)
      20:	39 80 00 00 	li      r12,0
      24:	39 60 00 00 	li      r11,0
      28:	3b 40 00 00 	li      r26,0
      2c:	3b 20 00 00 	li      r25,0
      30:	7c 98 23 78 	mr      r24,r4
      34:	7c 77 1b 78 	mr      r23,r3
      38:	39 80 00 42 	li      r12,66
      3c:	39 60 00 00 	li      r11,0
      40:	7d 8c d2 14 	add     r12,r12,r26
      44:	39 60 00 00 	li      r11,0
      48:	7d 83 63 78 	mr      r3,r12
      4c:	82 e1 00 2c 	lwz     r23,44(r1)
      50:	83 01 00 30 	lwz     r24,48(r1)
      54:	83 21 00 34 	lwz     r25,52(r1)
      58:	83 41 00 38 	lwz     r26,56(r1)
      5c:	38 21 00 50 	addi    r1,r1,80
      60:	4e 80 00 20 	blr
    
    After this patch, the same test has become:
    
       0:	7c 64 1b 78 	mr      r4,r3
       4:	38 60 00 00 	li      r3,0
       8:	94 21 ff b0 	stwu    r1,-80(r1)
       c:	60 00 00 00 	nop
      10:	39 80 00 00 	li      r12,0
      14:	39 60 00 00 	li      r11,0
      18:	39 00 00 00 	li      r8,0
      1c:	38 e0 00 00 	li      r7,0
      20:	7c 86 23 78 	mr      r6,r4
      24:	7c 65 1b 78 	mr      r5,r3
      28:	39 80 00 42 	li      r12,66
      2c:	39 60 00 00 	li      r11,0
      30:	7d 8c 42 14 	add     r12,r12,r8
      34:	39 60 00 00 	li      r11,0
      38:	7d 83 63 78 	mr      r3,r12
      3c:	38 21 00 50 	addi    r1,r1,80
      40:	4e 80 00 20 	blr
    
    Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
    Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    Link: https://lore.kernel.org/r/b94562d7d2bb21aec89de0c40bb3cd91054b65a2.1616430991.git.christophe.leroy@csgroup.eu
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