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Ching-Te Ku authored
Some register definition and bit definition were incorrect. e.g. REG_BT_COEX_V2 should be word alignment to meet the coding style. e.g. set REG_BT_TDMA_TIME[5:0]=0x5, But the original is to set REG_BT_TDMA_TIME[7:0]=0x5. This will cause unexpected hardware behavior. Signed-off-by:
Ching-Te Ku <ku920601@realtek.com> Signed-off-by:
Ping-Ke Shih <pkshih@realtek.com> Signed-off-by:
Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20201109085909.9143-2-pkshih@realtek.com
Ching-Te Ku authoredSome register definition and bit definition were incorrect. e.g. REG_BT_COEX_V2 should be word alignment to meet the coding style. e.g. set REG_BT_TDMA_TIME[5:0]=0x5, But the original is to set REG_BT_TDMA_TIME[7:0]=0x5. This will cause unexpected hardware behavior. Signed-off-by:
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