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    aa2ddd24
    platform/x86: ISST: Use numa node id for cpu pci dev mapping · aa2ddd24
    Srinivas Pandruvada authored
    
    
    There is a problem in mapping CPU to a PCI device instance when the
    bus numbers are reused in different packages. This was observed on
    some Sapphire Rapids systems.
    
    The current implementation reads bus number assigned to a CPU package
    via MSR 0x128. This allows to establish relationship between a CPU
    and a PCI device. This allows to update power related parameters to a
    MMIO offset in a PCI device space which is unique to a CPU. But if
    two packages uses same bus number then this mapping will not be unique.
    
    When bus number is reused, PCI device will use different domain number
    or segment number. So we need to be aware of this domain information
    while matching CPU to PCI bus number. This domain information is not
    available via any MSR. So need to use ACPI numa node information.
    
    There is an interface already available in the Linux to read numa
    node for a CPU and a PCI device. This change uses this interface
    to check the numa node of a match PCI device with bus number.
    If the bus number and numa node matches with the CPU's assigned
    bus number and numa node, the matched PCI device instance will be
    returned to the caller.
    
    It is possible that before Sapphire Rapids, the numa node is not
    defined for the Speed Select PCI device in some OEM systems. In this
    case to restore old behavior, return the last matched PCI device
    for domain 0 unlsess there are more than one matches.
    
    Signed-off-by: default avatarSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
    Link: https://lore.kernel.org/r/20210616221329.1909276-2-srinivas.pandruvada@linux.intel.com
    
    
    Reviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
    Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
    aa2ddd24
    platform/x86: ISST: Use numa node id for cpu pci dev mapping
    Srinivas Pandruvada authored
    
    
    There is a problem in mapping CPU to a PCI device instance when the
    bus numbers are reused in different packages. This was observed on
    some Sapphire Rapids systems.
    
    The current implementation reads bus number assigned to a CPU package
    via MSR 0x128. This allows to establish relationship between a CPU
    and a PCI device. This allows to update power related parameters to a
    MMIO offset in a PCI device space which is unique to a CPU. But if
    two packages uses same bus number then this mapping will not be unique.
    
    When bus number is reused, PCI device will use different domain number
    or segment number. So we need to be aware of this domain information
    while matching CPU to PCI bus number. This domain information is not
    available via any MSR. So need to use ACPI numa node information.
    
    There is an interface already available in the Linux to read numa
    node for a CPU and a PCI device. This change uses this interface
    to check the numa node of a match PCI device with bus number.
    If the bus number and numa node matches with the CPU's assigned
    bus number and numa node, the matched PCI device instance will be
    returned to the caller.
    
    It is possible that before Sapphire Rapids, the numa node is not
    defined for the Speed Select PCI device in some OEM systems. In this
    case to restore old behavior, return the last matched PCI device
    for domain 0 unlsess there are more than one matches.
    
    Signed-off-by: default avatarSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
    Link: https://lore.kernel.org/r/20210616221329.1909276-2-srinivas.pandruvada@linux.intel.com
    
    
    Reviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
    Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
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