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    148842c9
    Merge tag 'x86-apic-2020-12-14' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 148842c9
    Linus Torvalds authored
    Pull x86 apic updates from Thomas Gleixner:
     "Yet another large set of x86 interrupt management updates:
    
       - Simplification and distangling of the MSI related functionality
    
       - Let IO/APIC construct the RTE entries from an MSI message instead
         of having IO/APIC specific code in the interrupt remapping drivers
    
       - Make the retrieval of the parent interrupt domain (vector or remap
         unit) less hardcoded and use the relevant irqdomain callbacks for
         selection.
    
       - Allow the handling of more than 255 CPUs without a virtualized
         IOMMU when the hypervisor supports it. This has made been possible
         by the above modifications and also simplifies the existing
         workaround in the HyperV specific virtual IOMMU.
    
       - Cleanup of the historical timer_works() irq flags related
         inconsistencies"
    
    * tag 'x86-apic-2020-12-14' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (42 commits)
      x86/ioapic: Cleanup the timer_works() irqflags mess
      iommu/hyper-v: Remove I/O-APIC ID check from hyperv_irq_remapping_select()
      iommu/amd: Fix IOMMU interrupt generation in X2APIC mode
      iommu/amd: Don't register interrupt remapping irqdomain when IR is disabled
      iommu/amd: Fix union of bitfields in intcapxt support
      x86/ioapic: Correct the PCI/ISA trigger type selection
      x86/ioapic: Use I/O-APIC ID for finding irqdomain, not index
      x86/hyperv: Enable 15-bit APIC ID if the hypervisor supports it
      x86/kvm: Enable 15-bit extension when KVM_FEATURE_MSI_EXT_DEST_ID detected
      iommu/hyper-v: Disable IRQ pseudo-remapping if 15 bit APIC IDs are available
      x86/apic: Support 15 bits of APIC ID in MSI where available
      x86/ioapic: Handle Extended Destination ID field in RTE
      iommu/vt-d: Simplify intel_irq_remapping_select()
      x86: Kill all traces of irq_remapping_get_irq_domain()
      x86/ioapic: Use irq_find_matching_fwspec() to find remapping irqdomain
      x86/hpet: Use irq_find_matching_fwspec() to find remapping irqdomain
      iommu/hyper-v: Implement select() method on remapping irqdomain
      iommu/vt-d: Implement select() method on remapping irqdomain
      iommu/amd: Implement select() method on remapping irqdomain
      x86/apic: Add select() method on vector irqdomain
      ...
    148842c9
    Merge tag 'x86-apic-2020-12-14' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
    Linus Torvalds authored
    Pull x86 apic updates from Thomas Gleixner:
     "Yet another large set of x86 interrupt management updates:
    
       - Simplification and distangling of the MSI related functionality
    
       - Let IO/APIC construct the RTE entries from an MSI message instead
         of having IO/APIC specific code in the interrupt remapping drivers
    
       - Make the retrieval of the parent interrupt domain (vector or remap
         unit) less hardcoded and use the relevant irqdomain callbacks for
         selection.
    
       - Allow the handling of more than 255 CPUs without a virtualized
         IOMMU when the hypervisor supports it. This has made been possible
         by the above modifications and also simplifies the existing
         workaround in the HyperV specific virtual IOMMU.
    
       - Cleanup of the historical timer_works() irq flags related
         inconsistencies"
    
    * tag 'x86-apic-2020-12-14' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (42 commits)
      x86/ioapic: Cleanup the timer_works() irqflags mess
      iommu/hyper-v: Remove I/O-APIC ID check from hyperv_irq_remapping_select()
      iommu/amd: Fix IOMMU interrupt generation in X2APIC mode
      iommu/amd: Don't register interrupt remapping irqdomain when IR is disabled
      iommu/amd: Fix union of bitfields in intcapxt support
      x86/ioapic: Correct the PCI/ISA trigger type selection
      x86/ioapic: Use I/O-APIC ID for finding irqdomain, not index
      x86/hyperv: Enable 15-bit APIC ID if the hypervisor supports it
      x86/kvm: Enable 15-bit extension when KVM_FEATURE_MSI_EXT_DEST_ID detected
      iommu/hyper-v: Disable IRQ pseudo-remapping if 15 bit APIC IDs are available
      x86/apic: Support 15 bits of APIC ID in MSI where available
      x86/ioapic: Handle Extended Destination ID field in RTE
      iommu/vt-d: Simplify intel_irq_remapping_select()
      x86: Kill all traces of irq_remapping_get_irq_domain()
      x86/ioapic: Use irq_find_matching_fwspec() to find remapping irqdomain
      x86/hpet: Use irq_find_matching_fwspec() to find remapping irqdomain
      iommu/hyper-v: Implement select() method on remapping irqdomain
      iommu/vt-d: Implement select() method on remapping irqdomain
      iommu/amd: Implement select() method on remapping irqdomain
      x86/apic: Add select() method on vector irqdomain
      ...
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